As artificial intelligence expands from the cloud to the edge, edge computing is seen as the next AI battlefield. Massive application scenarios and huge computing requirements have not only attracted giants such as Intel and Nvidia to accelerate the improvement of cloud-edge integration, but also attracted many AI chip companies to join the bureau.
AI in the cloud has made Nvidia a huge success. If marginal AI is a new opportunity, which companies have a chance to win?
The most suitable chip route?
General-purpose and dedicated computing routes have been discussed in the industry for a long time, and this topic is actually accompanied by diverse and fragmented application scenarios. The scene is fragmented, the product is fragmented, what about the chip? It can only be fragmented and dedicated, and can’t it be universal? Will General Computing Big Brothers CPU and GPU fall by the side? How will the relationship between general computing and dedicated computing develop in the future?
Yu Xin, president of time engine Technology, said that architectural design for different applications must be needed. Domain specific architecture (DSA) processors and chips are essentially meant to solve the problem of balance and trade-off between generality and specificity.
“there are two major premises here, one is that end-to-side applications are more fragmented, and the second is that there are often higher requirements for power consumption and cost. Under these two premises, how to ensure sufficient competitiveness relative to a certain scenario to meet the requirements of cost and power consumption, while taking into account sufficient market space-this is a challenge that every company has to face. it is also a test of product definition ability, “he stressed.
Although the general-purpose computing chip can cover all the operations needed by the edge computing program, it can not adapt to the rapid growth of edge-side demand in time in terms of chip architecture scalability and performance. General-purpose computing and special computing chips have shown a trend of integrated development. Moreover, the computing characteristics determine the difference between the edge chip and the cloud chip, and the architecture design needs to be optimized and customized.
Hua Baohong, deputy general manager of Lingxi Technology, said that the two should complement each other and had better be integrated. Special computing chips will include general computing cores, such as IP cores such as Arm or RISC-V. New computing architecture chips, such as brain-like computing chips, not only include neural mimicry computing core and neural network computing core, but also have general Arm core. At the same time, general-purpose computing chips, such as the latest Arm chip, will also have built-in IP cores for traditional neural network acceleration. Heterogeneous fusion chip architecture is the necessity of development.
With this trend, it means that the dedicated computing units responsible for acceleration need to be moved into the general programming model, and there is always pressure to create general-purpose processors. Rob Fisher, director of product management for Imagination’s computing business, said that this is mainly from the perspective of the ease of use of general-purpose processor programming. This pattern is limited when the size of the task or the performance required is far beyond the scope of the common solution.
He pointed out that GPU is a good example. In practical applications, the advantage of offloading graphics processing workload to GPU is obvious, which promotes the independent development of efficient GPUs. Vector processors are increasingly integrated with the CPU architecture, allowing instruction-level acceleration of computing tasks.
Zhao Xiaowu, vice president of Xuehu Science and Technology, said that according to the different functional and performance requirements in different scenarios, the edge requirements are more complex, and it is difficult to use a general architecture or platform to meet most of the requirements. Therefore, special architecture design will be carried out for different application scenarios. General computing chips can be used for parts with low performance requirements and fast algorithm changes, such as CPU; with high performance requirements, and special computing chips can be used for relatively fixed algorithms. For example, FPGA programmable chips can be used for parts of ASIC; that have certain requirements for performance and algorithm flexibility.
Taking the edge computing in the field of intelligent transportation as an example, he said that because it is basically an outdoor scene, and the environment is complex and harsh, not only to meet the large computing power and low delay of AI, but also to meet the reliability and stable operation, so most edge computers can not meet the demand at present. In order to meet the needs of these special scenarios, the chips of the same level of outdoor base stations are used to customize the special big computing computer for this kind of scene.
Chiplet is just popular
With the rise of high-performance computing and machine learning, the workload that heterogeneous processors have to deal with increases sharply, so it is very important to establish open ecological cooperation in the whole semiconductor industry.
Not long ago, Intel, AMD, Arm, Qualcomm, TSMC and others have jointly established the Chiplet Standards Alliance and launched the general Chiplet high-speed interconnection standard UCIe. Under the framework of UCIe, the interconnection interface standard is unified, and all kinds of Chiplet chips with different processes and functions are expected to be integrated through various packaging methods such as 2D, 2.5D, 3D, etc., and various forms of processing engines will form a super-large-scale complex chip system.
At GTC22 last month, Nvidia announced support for the UCIe specification on the one hand and open its NVLink-C2C interconnect technology for semi-custom chips on the other, which is a chip-to-chip and bare-chip interconnection technology that supports memory consistency. This route has clearly demonstrated Nvidia’s heterogeneous determination, under which it is theoretically possible to put Nvidia’s chips in the same package as competitors’ chips.
Huang Renxun told that he likes PCIe first and UCIe second, and predicts that the benefits of UCIe will gradually become apparent within five years. As for Nvidia’s own NVlink interconnection technology, he stressed that the advantage lies in the ability to connect directly. UCIe does not have direct access to the chip and is still a peripheral interface, while NVlink has the advantage of being able to connect directly, almost as if it were directly connected to the brain. To some extent, this may lead to the complexity of its assembly, and partners and customers must have a good understanding of NVlink. However, once they can do this, they can make full use of all the resources inside the chip, as if they were all on the same chip.
This solution not only shows that Nvidia does not intend to exclude itself from the UCIe alliance, but also shows absolute confidence in its own NVLink interconnection technology, which is speculated to be the key to building a heterogeneous ecology.
Can a new generation of Intel and Nvidia be born in the marginal market?
The huge potential of the marginal computing market naturally attracts competition from cloud chip giants. They are making a comprehensive layout through heterogeneous computing, advanced processes, advanced packaging and other ways. Coupled with the high ecological barriers, do AI chip manufacturers have a chance to compete with it?
“those who can build skyscrapers are not necessarily good at carving beams and painting columns. Of course, compared with the current highly monopolistic and centralized pattern in the cloud, there is no definite pattern on the edge side, and everyone has the opportunity, while manufacturers with stronger technical capabilities and landing capabilities will have a greater chance to stand out in the competition. “it makes sense for Yunbian to integrate and cooperate in some scenarios, but it will still be very different from the perspective of chip design,” said Yu Xin. ”
Hua Baohong of Lingxi Technology believes that heterogeneous computing, advanced processes and advanced packaging are all means, which can not fundamentally solve the problems of high energy efficiency, small sample learning, online learning and so on. Driven by industry orientation and market demand, the heterogeneous integration of von Neumann architecture and non-von Neumann architecture will become the core engine driving edge computing technology innovation and future high-quality development of the industry.
On the one hand, the chip of von Neumann architecture is still following the aesthetic direction of “violent computing” and will consider using the most advanced processes and packages to improve computing power; on the other hand, non-von Neumann architecture gives priority to architecture innovation to meet the large-scale use of biological neural networks, brain-like directions and new hybrid neural networks. The new computing architecture represented by brain-like computing will be deeply integrated with the traditional computing architecture, leading a new round of technological change.
Zhao Xiaowu of Xuehu Technology said that the leading manufacturers in the industry have begun to use small chips to piece together large chips to complete product layout to meet the computing needs of different scenarios. Apple and Nvidia, for example, are starting to use this “building block” approach, which is a very clear trend.
The China market has developed rapidly in the past two years, but there are not many large-scale and competitive manufacturers. “the chip is still an industry that needs to be accumulated, and the industrial chain is relatively long,” Zhao Xiaowu said. “at present, the small and many forms in China are not conducive to competing for the right to speak with the upstream and downstream. It is expected that there will be a wave of elimination of AI chip manufacturers in the next 1-2 years.”
Qiu Xiaoxi, founder, chairman and CEO of Aixin Yuanzhi, expressed a similar view, saying that it is now an once-in-a-lifetime opportunity for the China chip industry, and many start-up companies have emerged due to market demand and state support. Starting from the general environment, China’s chip industry is still in the early stage, showing a trend of letting a hundred flowers blossom, but with the continuous development and growth of the industry, the subsequent industry integration will also be a necessary process. She stressed that this is in line with the law of the development of the chip industry in the past few decades, after such integration, there will be leading enterprises in the industry, which is very important for the development of the country’s industry as a whole. Only in this way can Chinese enterprises and large international companies have the opportunity to compete on the same stage.
Lingxi technology Hua Baohong said that the marginal AI chip market is still open and there is no absolute overlord. The emerging and diversified application scenarios have brought huge market opportunities for China AI chips, especially in the increasingly fragmented markets such as autopilot, intelligent security, intelligent Internet of things and wearable devices.China AI chip manufacturers and international giant chip manufacturers stand on the same starting line, and even have more advantages in some fields.
…………………
